1. Field of the Invention
The present invention generally relates to multiplex communications systems and, more particularly, to a controller circuit for the fast allocation of variable length time-slots in voice/data switching systems.
2. Description of the Prior Art
With the recent growth in the use of computers, there has been an increase in demand for data. Much of this demand also comes from terminal locations which also have a need for the transmission of voice or, more broadly, for synchronous transmission. Thus, there is a demand for integrated switching of voice and data. Various schemes for the switching of voice and data have been developed. The most recent of which are time division switching schemes or a combination of time and space switching schemes. However, as will be described below, these methods provide low capacity integrated voice and data switching with high costs and poor growth potential.
One system for integrating the switching of circuit and packet data using both time and space switching is described in U.S. Pat. No. 3,766,322 to Moffet et al. The system described therein uses a number of cross-point switching matrices for the space switching, with one dedicated matrix to each data-rate category being switched. Both circuit and packet data can be transmitted through the same matrix if they are of the same data rate. Also, individual time division switches, dedicated to each data rate being switched, are used to perform the time switching. The system described in Moffet et al. is a relatively low speed and hence low capacity system. It can also be seen that any attempt to increase the number of switched data rate categories using an apparatus of the type described by Moffet et al. would result in a complex apparatus involving a large number of individual time and space switches. This complexity is a result of the need to dedicate a time and a space switch to each data rate category. To grow with increased demand, even without increasing the number of data rate categories, could also require a number of space and time switches because of the need to dedicate individual facilities for each data rate category. Thus, the Moffet et al. switching system, by requiring a number of dedicated matrices and time switches, makes system growth relatively difficult and facility costs high.
Another switching mechanism for both circuit and packet switching is disclosed in U.S. Pat. No. 4,413,337 to Dauphin et al. This mechanism uses only time division switching and not space division switching. Thus, the system disclosed therein offers a relatively low capacity system servicing in the vicinity of up to 256 64-kbit/sec circuit channels.
In switching systems for integrated voice/data communications, there is a need to establish the same connections over a number of consecutive time intervals. If the time slots are of fixed size, as is common in prior art switching systems, an allocation mechanism consisting of memory and counter with associated control logic usually suffices. However, modern switching system applications require fast, on demand allocation of variable length time slots in a communications system.